The neutral-atom qubit community has spent the last eighteen months producing a cascade of impressive fidelity numbers. Two-qubit gate fidelities at 99.5%. Single-qubit fidelities above 99.9%. Midcircuit measurement fidelities approaching 99.7%. These are genuinely significant results — but the way they get cited in press releases and pitch decks obscures a more complicated reality. As these platforms move from 256-qubit to 10,000-qubit arrays, the conversation about fidelity needs to change substantially.
This memo is written for technically literate readers who want to understand what these numbers imply for fault-tolerant quantum computation — and what they don't. It is not a tutorial on quantum error correction; that literature is extensive. It is an attempt to frame the engineering challenges that actually determine whether neutral-atom hardware closes the gap to fault tolerance.
The Threshold Theorem Is Not a Binary Threshold
The phrase "below the fault-tolerance threshold" implies a step function: either you're in fault-tolerant territory or you're not. The actual situation is considerably more nuanced. The surface code threshold — commonly cited at roughly 1% physical error rate — is an asymptotic statement. It tells you that, given error rates below this value, you can in principle reach arbitrarily low logical error rates by adding more physical qubits per logical qubit. What it does not tell you is how many physical qubits you need to achieve any specific logical error rate target at a specific physical error rate.
At a physical two-qubit gate fidelity of 99.5% — which means an error rate of 0.5%, comfortably below the 1% surface code threshold — achieving a logical error rate of 10−10 per logical gate cycle requires roughly 1,000 to 2,000 physical qubits per logical qubit, depending on the specific implementation and what you count as an error. A 100-logical-qubit computation at that error target therefore requires somewhere between 100,000 and 200,000 physical qubits. At 99.9% fidelity (0.1% error rate), the number drops to roughly 100 to 200 physical qubits per logical qubit. That difference — a factor of 10 in required physical qubits — is what makes the gap between 99.5% and 99.9% meaningful from a systems perspective.
The practical implication: two platforms with identical fidelity claims can have very different physical-qubit overhead requirements depending on what specific errors are being counted, under what conditions, and in what sequence of operations.
What Gets Measured Versus What Matters
Fidelity benchmarks in the neutral-atom literature typically report randomized benchmarking (RB) results or direct process tomography on isolated two-qubit gate operations. RB in particular has a well-understood limitation: it characterizes average gate error but is not directly predictive of fault-tolerant performance, because it averages over error mechanisms that behave very differently under error correction. A gate with predominantly coherent (unitary) errors may show the same RB result as a gate with predominantly incoherent (depolarizing) errors, but the fault-tolerance implications differ.
For neutral-atom platforms specifically, the dominant error sources include: spontaneous emission from the Rydberg intermediate states used for two-qubit gates, laser phase noise during gate pulses, atomic motional heating in optical tweezers, and crosstalk between neighboring qubits during parallel gate operations. Each of these has a different correction cost and a different scaling behavior as arrays grow.
Spontaneous emission is the most fundamental constraint. The Rydberg state used to mediate two-qubit entanglement has a finite lifetime — typically on the order of 100 microseconds to several hundred microseconds depending on the principal quantum number and atomic species. Two-qubit gate times in current platforms run 0.5 to 2 microseconds, which means spontaneous emission contributes at the 0.5% to 2% level to gate error before any other mechanism is counted. Platforms using alkaline-earth atoms (strontium-88, ytterbium-171) have been specifically engineered to address this: their metastable clock states provide long-lived qubit storage separate from the computational Rydberg levels, enabling the "zoned" architectures that physically separate storage from gate regions.
The Connectivity Problem at 10,000 Qubits
The defining hardware advantage of neutral-atom systems is reconfigurability. Optical tweezers can rearrange qubits mid-circuit — creating a programmable connectivity graph that superconducting qubit arrays, with their fixed couplers, cannot match. This has genuine computational implications: certain quantum algorithms that require non-local operations benefit substantially from mid-circuit rearrangement, because the alternative on fixed-topology hardware is a long chain of SWAP gates, each adding error.
At 256 qubits, rearrangement is fast and the overhead manageable. At 10,000 qubits, rearrangement becomes a logistics problem. Atom transport across large arrays introduces motional excitation — heating that degrades coherence — and takes time. Transport fidelity drops with distance. The architecture choices that work at 256 qubits (small zone-to-zone distances, high transport fidelity, low latency) require explicit engineering to maintain at 10,000 qubits, and the solutions are not straightforward. Array stitching using multiple spatial light modulators, acoustic-optic deflectors operating at higher bandwidth, and zoned computation that minimizes long-range moves are all active research areas.
The competitive comparison here is to superconducting platforms, which achieve faster gate times (nanoseconds versus microseconds) but at fixed connectivity. For circuits with high two-qubit gate density and non-local structure, neutral-atom reconfigurability reduces the total gate count substantially — potentially by an order of magnitude or more for specific algorithms. For circuits that are already planar-friendly, the advantage is smaller. The right comparison is not "which technology has better gate fidelity" but "which technology achieves lower logical error rate per unit of physical resource for the target circuit family."
Midcircuit Measurement and the Feedback Latency Problem
Fault-tolerant quantum computation under the surface code requires midcircuit measurement (MCM) — the ability to measure ancilla qubits without destroying data qubit coherence, then feed the measurement results forward to subsequent correction operations. Neutral-atom platforms have made significant progress on MCM using the narrow-linewidth imaging transitions available in alkaline-earth atoms. Fidelities above 99.5% for MCM have been demonstrated in small registers.
The challenge is latency. A surface code cycle requires: measure ancilla qubits, read out measurement results, classical processing to decode the syndrome, and application of correction operations — all within the coherence time of the data qubits. For a 10,000-qubit array with a coherence time of 10 seconds, this is not an immediate constraint. But for fault-tolerant computation at scale, the throughput of the syndrome decoder sets the clock rate of the logical processor. Real-time decoding of surface code syndromes over large logical qubit arrays is a significant classical computing problem, and the latency of that classical decoding chain feeds back into the effective logical gate time.
Atom Computing's platform — a portfolio company — uses nuclear-spin qubits in ytterbium-171 precisely because the nuclear spin degree of freedom provides coherence times measured in tens of seconds in the absence of gate operations. This margin provides headroom for the classical feedback loop. The engineering question is whether that headroom survives as array sizes grow and syndrome processing complexity increases.
What the Next Eighteen Months Will Clarify
The platform-level question that will determine the fault-tolerance trajectory of neutral-atom hardware is not gate fidelity in isolation — it is the product of (fidelity) × (connectivity) × (midcircuit measurement fidelity) × (syndrome decoding latency), integrated over a full error correction cycle at the target array size. None of these factors can be optimized independently: higher-fidelity gates sometimes require longer gate times, which increases spontaneous emission; better connectivity requires more atom transport, which introduces motional heating; faster MCM may use bright imaging light that causes more back-action on data qubits.
The demonstrations we expect to see over the next eighteen months will reveal how these tradeoffs resolve at the 1,000-qubit scale. Platforms that can demonstrate repeated surface code stabilizer cycles with below-threshold logical error rates on even small (distance-3 or distance-5) logical qubits will have crossed the engineering threshold that matters. The absolute fidelity numbers in isolation are increasingly secondary to that system-level demonstration.
From an investment standpoint, the teams that understand this distinction — and are building toward it rather than optimizing component-level benchmarks — are the ones that will close the gap to useful fault-tolerant computation. The fidelity numbers are necessary but not sufficient. The question is always: sufficient for what, under what conditions, at what scale?
This memo represents the views of the author. It does not constitute investment advice or a recommendation to buy or sell any security. References to portfolio companies are for illustrative purposes only.